Enhanced Description

Features

● C Compiler Optimized RISC Architecture
● Operating Speed:
- DC - 64 MHz Clock Input
- 62.5 Ns Minimum Instruction Cycle
● Programmable 2-Level Interrupt Priority
● 31-Level Deep Hardware Stack
● Three 8-Bit Timers (TMR2/4/6) With Hardware Limit Timer (HLT)
● Four 16-Bit Timers (TMR0/1/3/5)
● Low-Current Power-on Reset (POR)
● Power-up Timer (PWRT)
● Brown-out Reset (BOR)
● Low-Power BOR (LPBOR) Option
● Windowed Watchdog Timer (WWDT):
- Watchdog Reset On Too Long Or Too Short Interval Between Watchdog Clear Events
- Variable Prescaler Selection
- Variable Window Size Selection
- All Sources Configurable In Hardware Or Software
Memory
● Up To 32K Bytes Program Flash Memory
● Up To 2048 Bytes Data SRAM Memory
● 256 Bytes Data EEPROM
● Programmable Code Protection
● Direct, Indirect, And Relative Addressing Modes
Operating Characteristics
● Operating Voltage Ranges:
- 1.8V To 3.6V (PIC18LF24/25K40 )
- 2.3V To 5.5V ( PIC18F24/25K40)
● Temperature Range:
- Industrial: -40°C To 85°C
- Extended: -40°C To 125°C
Power-Saving Operation Modes
● Doze: CPU And Peripherals Running At Different Cycle Rates (typically CPU Is Lower)
● Idle: CPU Halted While Peripherals Operate
● Sleep: Lowest Power Consumption
● Peripheral Module Disable (PMD):
- Ability To Selectively Disable Hardware Module To Minimize Active Power Consumption Of Unused
Peripherals
● Extreme Low-Power Mode (XLP)
- Sleep: 500 NA Typical @ 1.8V
- Sleep And Watchdog Timer: 900 NA Typical @ 1.8V
EXtreme Low-Power (XLP) Features
● Sleep Mode: 50 NA @ 1.8V, Typical
● Windowed Watchdog Timer: 500 NA @ 1.8V, Typical
● Secondary Oscillator: 500 NA @ 32 KHz
● Operating Current:
- 8 μA @ 32 KHz, 1.8V, Typical
- 32 μA/MHz @ 1.8V, Typical
Digital Peripherals
● Complementary Waveform Generator (CWG):
- Rising And Falling Edge Dead-band Control
- Full-bridge, Half-bridge, 1-channel Drive
- Multiple Signal Sources
● Capture/Compare/PWM (CCP) Modules:
- Two CCPs
- 16-bit Resolution For Capture/Compare Modes
- 10-bit Resolution For PWM Mode
● 10-Bit Pulse-Width Modulators (PWM):
- Two 10-bit PWMs
● Serial Communications:
- One Enhanced USART (EUSART) With Auto-Baud Detect, Auto-wake-up On Start, RS-232, RS-485, LIN Compatible
- SPI
- I2C, SMBus And PMBus Compatible
● Up To 25 I/O Pins And One Input Pin:
- Individually Programmable Pull-ups
- Slew Rate Control
- Interrupt-on-change On All Pins
- Input Level Selection Control
● Programmable CRC With Memory Scan:
- Reliable Data/program Memory Monitoring For Fail-Safe Operation (e.g., Class B)
- Calculate CRC Over Any Portion Of Flash Or EEPROM
- High-speed Or Background Operation
● Hardware Limit Timer (TMR2/4/6+HLT):
- Hardware Monitoring And Fault Detection
● Peripheral Pin Select (PPS):
- Enables Pin Mapping Of Digital I/O
● Data Signal Modulator (DSM)
Analog Peripherals
● 10-Bit Analog-to-Digital Converter With Computation (ADCC):
- 24 External Channels
- Conversion Available During Sleep
- Four Internal Analog Channels
- Internal And External Trigger Options
- Automated Math Functions On Input Signals:
● Averaging, Filter Calculations, Oversampling And Threshold Comparison
- 8-bit Hardware Acquisition Timer
● Hardware Capacitive Voltage Divider (CVD) Support:
- 8-bit Precharge Timer
- Adjustable Sample-and-Hold Capacitor Array
- Guard Ring Digital Output Drive
● Zero-Cross Detect (ZCD):
- Detect When AC Signal On Pin Crosses Ground
● 5-Bit Digital-to-Analog Converter (DAC):
- Output Available Externally
- Programmable 5-bit Voltage (% Of VDD, [VREF+ - VREF-], FVR)
- Internal Connections To Comparators And ADC
● Two Comparators (CMP):
- Four External Inputs
- External Output Via PPS
● Fixed Voltage Reference (FVR) Module:
- 1.024V, 2.048V And 4.096V Output Levels
- Two Buffered Outputs: One For DAC/CMP And One For ADC
Clocking Structure
● High-Precision Internal Oscillator Block (HFINTOSC):
- Selectable Frequencies Up To 64 MHz
- ±1% At Calibration
● 32 KHz Low-Power Internal Oscillator (LFINTOSC)
● External 32 KHz Crystal Oscillator (SOSC)
● External High-Frequency Oscillator Block:
- Three Crystal/Resonator Modes
- Digital Clock Input Mode
- 4x PLL With External Sources
● Fail-Safe Clock Monitor:
- Allows For Safe Shutdown If External Clock Stops
● Oscillator Start-up Timer (OST)
Programming/Debug Features
● In-Circuit Serial Programming (ICSP ) Via Two Pins
● In-Circuit Debug (ICD) With Three Breakpoints Via Two Pins
● Debug Integrated On-Chip

Applications

● Embedded Systems For Motor Control
● Digital Power Supplies
● Instrumentation
● Communication Systems

Datasheets

Latest Availability

3D & ECAD Model